The present invention relates generally to a method of forming an interface for a silicon contact. More specifically, the invention relates to a barrier between two electrically conductive portions of a semiconductor device. In a particularly preferred implementation, the present invention relates to a diffusion barrier between a polysilicon plug and a capacitor plate that forms a part of a dynamic random access memory (DRAM).
In the process of fabricating a memory cell for a DRAM or other memory device, it is often desirable to construct the capacitor portion of that memory cell so that the capacitor is elevated from the semiconductor substrate that supports the device. For example, it is known in the art to construct the access transistor portion of a memory cell relatively close to the surface of the substrate. The gate of the access transistor is above the substrate, separated only by a thin layer of oxide. Moreover, the source and drain of the access transistor are often doped portions of the substrate itself. It is further known to then provide an insulating layer, such as an oxide, over this access transistor and other devices, wherein the layer is thick enough to have a planar surface despite the features protruding from the substrate. A contact hole is etched through this oxide to one of the doped portions of the substrate and is filled with a conductive material, such as doped polycrystalline silicon, or polysilicon. The polysilicon filling this contact hole is often known as a poly plug. An additional layer of oxide is then formed over the first, and a container is etched from the additional oxide layer, wherein the bottom of the container corresponds with the top of the polysilicon plug. The capacitor is formed within this container. As part of this process, a layer of conductive material will be provided at least along the bottom of the container to serve as the capacitor""s bottom plate. This step is followed by providing a dielectric layer over the bottom plate and a top plate over the dielectric layer. The contact between the bottom plate of the capacitor and the poly plug allows electrical communication between the bottom plate and between one of the transistor""s doped substrate portions.
This known process raises several concerns. First, there is a tendency for the silicon in the poly plug to diffuse into the cell dielectric during fabrication, which decreases the performance of the capacitor. Second, there is a tendency for the poly plug to oxidize during the various processes performed after the poly plug is created. This oxidization inhibits the ability of the poly plug to channel electrical signals. These concerns are in addition to the fact that those skilled in the art are constantly striving to improve the electrical contact between the poly plug and the bottom plate of the capacitor. Moreover, such problems arise in other processes concerning silicon contacts, such as damascene processes.
Accordingly, the present invention provides a method of creating a silicon contact interface. In one exemplary embodiment, a diffusion barrier is provided during the fabrication of a memory cell and, more specifically, after forming the poly plug and before fabricating the capacitor portion of the memory cell. In a more specific embodiment, this barrier is created by siliciding and nitridizing a metal layer provided over the poly plug. In yet another exemplary embodiment, this diffusion barrier also serves as an oxidation barrier which protects the poly plug from oxidation. In still another exemplary embodiment, a second material is provided to act as the oxidation barrier. Other embodiments provide a diffusion barrier during the fabrication of other memory device elements, such as during a damascene process. Finally, the current invention also includes within its scope the products resulting from these processes.